One of the products that caught my eye when looking at FPGAs for an upcoming project is the EOS S3. It's a Cortex M4 with an embedded FPGA available in a 3 x 3 mm, 0.4 mm pitch 8 x 8 mm BGA and 0.35 mm pitch 7 x 7 WLCSP packages. The 64 pin BGA provides over 40 I/O pins, which is more than I need, but basically perfect for my use. The peripherals look pretty decent, but the development boards are fairly expensive (~50+ CAD) given the cost of the chips are $6 CAD in low volume! It has more LUTs than every other FPGA on the market in low volume at that cost, aside from some poorly documented Chinese clones. The fact it also comes with a hard microcontroller is absolutely bonkers. Lastly, it has a completely open-source vendor-supported toolchain which is basically unheard of in this space.
To get the cost down and for the challenge of breaking out such a tiny BGA, I've decided to make a breadboardable breakout. It has a few extra features for quality of life:
Additionally, the files are available from my Pijul monorepo under a CC BY-SA license.
I'm currently targeting a $35 CAD price point, or roughly $25 USD.